| 摘要 |
<p>PURPOSE:To suppress the continuity of the same code by outputting the first bit while converting it into an NRZI, generating the alternate code when the code of the first bit is '0', and outputting this alternate code and the second bit of word data while executing an exclusive OR processing. CONSTITUTION:A least significant bit D0 is converted into the NRZI by an NRZI conversion circuit 1 and when this bit is made continuous in the state of '1', this signal D0 is outputted as the repeating pattern of '1' and '0' while executing the exclusive OR processing with an output DD0' of a shift register 12 by an exclusive OR circuit 11. When the code is made continuous in the state of the '0' level, an alternate pattern BP is generated from an alternate pattern generating circuit 3 and for this alternate pattern and a low-order second bit D1 of transmitting data SDT, the exclusive OR processing is executed by an exclusive OR circuit 4. Therefore, when this D0 is made continuous in the state of the '0' level, scramble is applied upon the low-order second bit D1.</p> |
