| 摘要 |
The circuit modulates the data transmitted from a serial data output port to input data for parallel device. The circuit includes a start bit detecting gate connected to the serial output port to transmit trigger signal when the serial transmission start bit is detected, a block data receiver control signal generater for generating for generating the block data receiver control signal when the trigger signal is generated by the start bit detecting gate, a shift clock generator for generating a clock signal having certain frequency same as the baud rate within one period of the receive control signal, a data modulator for shifting the serial data using the shift clock to generate the prallel data, and a latch circuit (24) for latching and transmitting the prallel data at the end of the receive control signal.
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