发明名称 TEST PATTERN GENERATOR
摘要 PURPOSE:To generate a test pattern for shortening the processing time of a calculator and conformable to the purpose of test by a method wherein all of paths capable of reaching an end point from a start point are traced while delay calculation is performed and the most critical path is selected. CONSTITUTION:A path trace delay calculation part 1 traces all of paths capable of reaching an end point from a start point while performing delay calculation and a critical path selection part 2 selects the traced paths. A pulse activating part 3 activates the path selected by the critical path selection part 2 and, when the selected path can be activated, a test pattern output part 4 generates the test pattern of the activated path and, when the selected path can not be activated, the selection part 2 selects a new path to activate the same. By this method, a critical path can be certainly selected and, since the path tried at the time of activation is limited, the processing time of a calculator can be shortened.
申请公布号 JPH03231174(A) 申请公布日期 1991.10.15
申请号 JP19900026167 申请日期 1990.02.07
申请人 FUJITSU LTD 发明人 MINAZU SHIGENARI
分类号 G01R31/3183;G01R31/28;G06F11/22;G06F17/50 主分类号 G01R31/3183
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