METHOD FOR DESIGNATING I/O ADDRESSES IN PROGRAMMABLE LAGIC CONTROLLER SYSTEM USING ADDING AND SUBSTRACTING TECHNIQUE

摘要

The multiple expanding units are connected to a programmable logic controller (basic unit) and an address decoder designates the I/O data of control objectives regardless to the order programmed by the basic unit. The circuit includes an unit selection gate (A14) for enabling the designation of port of the expanding unit when the result of an And gate is one or Zero and a port usage function selector (A11) for deciding the I/O ports (A18,A19) of the expanding unit by the R/W control signal transmitted from the CPU (A30). The first expanding unit executes the data communication through the first I/O port when the distinction information designates the first expanding unit and otherwise transmits the distinstion information by adding the number of I/ O ports.