摘要 |
PURPOSE:To prevent production of out of synchronism even when a reproduction data with a peak shift is inputted by detecting a frequency difference based on a phase difference between an output clock and an input data and correcting the frequency of the output clock. CONSTITUTION:When an output of a phase difference detection circuit 12 is biased toward a negative value, that is, the frequency of the recovery data 103 is higher than the frequency of the output clock 104, a frequency difference detection circuit 13 detects that the frequency exceeds negatively a prescribed range and outputs a DOWN signal. A frequency division ratio setting circuit 14 changes the frequency division ratio by the DOWN signal, the frequency of the output clock 104 of a frequency divider circuit 15 approaches the frequency of the recovered data 101. Thus, out of synchronism is not caused to the output clock 104 even when the recovered data with a peak shift is inputted. |