| 摘要 |
An IC card with a bus structure switchable between a narrow bus mode (such as an 8 bit bus) and a wide bus mode (such as a 16 bit bus). A plurality of memories are provided (in the example preferably 8 bit memories). Addresses are coupled to the IC card for activating the memories in parallel when in the wide bus mode or in selectable sequence when in the narrow bus mode. The data lines of the memories are connected by bus switching means to couple the memory data lines to the output bus so that data exchange is in parallel between both of the memories and the 16-bit bus in the wide bus mode, and is between individual ones of the memories and only the 8-bit bus in the narrow bus mode. The result is efficient use of both semiconductor memories in both the wide bus and narrow bus modes, with automatic switching between modes on the IC card in dependence upon a logic signal derived from the external terminal which defines the mode in which the IC card is intended to operate.
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