| 摘要 |
<p>PURPOSE:To prevent error to execute first write before a write mode is not completely set by outputting a preparation complete signal in the case of conversion to the write mode at a writable read only memory device. CONSTITUTION:When the set of the write mode is detected, this mulfunction can be prevented by displaying write mode completion at an external part after the lapse of prescribed time. Therefore, a MODE signal generation circuit 1-3 is provided at a memory device 1-1. When the write mode is set, a high voltage is impressed to a Vpp terminal 1. This high voltage is dropped by a level converter 1-7 and ANDed with a Vcc voltage at an AND gate 1-12. According to the output of the AND gate 1-2, a counter 1-10 counts time. When the counted time exceeds a set value, the time is outputted to a MODE terminal and according to this operation, a signal showing a writable state is outputted.</p> |
