发明名称 Output circuit.
摘要 <p>According to this invention, there is disclosed an output circuit including a MOS transistor (5) having two current paths inserted between a power source voltage (Vcc) and an output terminal (out), a MOS transistor (6) having two current paths inserted between a power source voltage (VSS) and the output terminal, a differential amplifier (1) for comparing a reference voltage (VOH) with an voltage (Vout) at the output terminal (out), a differential amplifier (2) for comparing a reference voltage (VOL) lower than the reference voltage (VOH) with the voltage (Vout) at the output terminal (out), an input terminal (in) for applying an input voltage (Vin), a logic gate (3) for receiving an output (N1) from the differential amplifier (1) and the input voltage (Vin), the logic gate (3) having an output terminal (N3) connected to a gate of the MOS transistor (5), and a logic gate (4) for receiving an output (N2) from the differential amplifier (2) and the input voltage (Vin), the logic gate (4) having an output terminal (N4) connected to a gate of the MOS transistor (6). &lt;IMAGE&gt;</p>
申请公布号 EP0449251(A2) 申请公布日期 1991.10.02
申请号 EP19910104878 申请日期 1991.03.27
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OHSAWA, TAKASHI, C/O INTELLECTUAL PROPERTY DIV.
分类号 H03K19/0185;G11C11/409 主分类号 H03K19/0185
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