发明名称 CONTOUR PAINT-OUT CIRCUIT
摘要 PURPOSE:To execute paint-out exactly and quickly by connecting N numbers of EXOR gates and one latch(LT) as prescribed, and outputting an EXOR gate output Q after the paint-out to an input decision bit. CONSTITUTION:When N=8, the first input D1-DN is 00100000 of I, and the output of LT is C0=00. Then, output Q1-QN is 00111111, that is, when D1=0, C0=0 then Q1=0, when D2=0 and Q1=0, then Q2=0, but since D3=1 when Q2=0 then Q3=1 when Q3=1, then D4=0 and Q4=1, and so on, and when D5-D8 is zero, then Q5-Q8 becomes one, and Q8=1 is fetched to a latch circuit LT. Next, for an input of 10110000, the output is 00100000. Next, for an input of 01001000, the output becomes 01110000. Apparently, the places between the first one and the next even number order is filled with one, so dots are filled between contour dots. Further, a generated discrimination dot is used, so it does not end at an odd number, so the error of painting out until the end of the character/ graphic does not occur.
申请公布号 JPH03222077(A) 申请公布日期 1991.10.01
申请号 JP19900017075 申请日期 1990.01.26
申请人 FUJITSU LTD 发明人 OKAMOTO MASAYUKI;YAMAUCHI MITSURU
分类号 G09G5/36;G06T11/40 主分类号 G09G5/36
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