| 摘要 |
<p>PURPOSE:To reduce noise caused based on a current by providing a delay circuit deviating the phase of a signal inputted to a bus driver to decrease the number of bus drivers operated simultaneously. CONSTITUTION:A delay circuit 31 is provided between a clock generating circuit 3 and a latch 2b, and a delay circuit 32 is provided between the delay circuit 31 and a latch 2c. Thus, the latch 2c is operated in somewhat lagging behind the latch 2b and the latch 2b is operated in somewhat lagging behind the latch 2a. As a result, a data signal is sequentially to bus drivers 4a-4c and bus signal lines 5a-5c. Thus, the three bus drivers are not simultaneously operated and the sum of the through-current and the charge/discharge current flowing in the bus driver is reduced as the entire device, and noise generated at the time of operating the bus driver is reduced.</p> |
