发明名称 |
START BIT DETECTION CIRCUIT |
摘要 |
<p>PURPOSE:To reduce the circuit scale by using a shift register for data serial/ parallel conversion in common use for a start bit detection shift register and constituting the circuit with a single shift register and a peripheral circuit of simple circuit constitution. CONSTITUTION:A 1st clock CLK1 is selectively outputted from a selector 12 and inputted to a shift register 11 and a start bit is serially inputted to a shift register 11, then a start bit discrimination circuit 13 applies its discrimination output to the selector 12 and a shift clock to the shift register 11 is switched into a 2nd clock CLK2. Thus, a data inputted to the shift register 11 serially just after the start bit is subject to bit-shift based on the 2nd clock CLK2 and extracted after serial/parallel conversion. Thus, the shift register 11 is used in common for both the start bit detection and data serial/parallel conversion to attain small-sized circuit constitution.</p> |
申请公布号 |
JPH03222539(A) |
申请公布日期 |
1991.10.01 |
申请号 |
JP19900018440 |
申请日期 |
1990.01.29 |
申请人 |
FUJITSU LTD;FUJITSU VLSI LTD |
发明人 |
MIYAKE TOMU;YOKOHIRA TAKESHI |
分类号 |
H04L7/00;H04L7/04;H04L25/38 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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