发明名称 FORMATION OF HIGH RESISTANT SEMICONDUCTOR LAYER
摘要 PURPOSE:To stabilize the high resistivity while sustaining the high purity by a method wherein a mixture of organic arsenic and arsine AsH3 is used as the V group source while the title high resistant semiconductor layer is formed without adding a dopant attaining to the compensation level. CONSTITUTION:The EL2 concentration (a) is specified to be a little higher than the residual impurity concentration, i.e. in the concrete, the EL2 concentration of 3.3X10<15>cm<-3> is 1.1 times of the residual impurity concentration of 3X10<15>cm<-3>. In order to meet this requirement, the mixture of organic arsenic and arsine AsH3 at the ratio of 0.35:1 is used as the V group source. Besides, the deposition temperature (b) is specified at 630 deg.C. Firstly, this high resistant Al0.28Ga0.72As layer 4000Angstrom is deposited, next, an electron running layer GaAs 4000Angstrom and an electron feeding layer AlGa As 400Angstrom are deposited. Later, HEMT in gate length of 1mum is formed of this crystal using the conventional photolithography.
申请公布号 JPH03222323(A) 申请公布日期 1991.10.01
申请号 JP19900017002 申请日期 1990.01.26
申请人 FUJITSU LTD 发明人 TAKIGAWA MASAHIKO;OKABE TADAO;YOSHIKAWA SHUNEI
分类号 H01L21/20;H01L21/205;H01L21/338;H01L21/76;H01L29/778;H01L29/812;H01S5/00 主分类号 H01L21/20
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