| 摘要 |
A CIRCUIT FOR TESTING THE BUS STRUCTURE OF A PRINTED WIRING CARD This circuit provides for testing the bus structure (address and data buses) of a printed wiring card. This circuit provides an inexpensive means for off line detection of low impedance paths between leads of bus oriented printed wiring cards. This circuit is particularly useful for testing high lead density printed wiring cards, such as, microprocessor or memory related printed wiring cards. This circuit automatically tests all possible combinations of bus leads for a shorted fault condition. This circuit operates without the application of any power to the printed wiring card to be tested. For the detection of any shorted fault leads, the identity of the shorted leads is displayed visually. In addition for a shorted fault lead, a determination is made as to whether the shorted leads are address bus leads or data bus leads. A visual display indicates whether the particular printed wiring card has successfully passed all the tests. |
