| 摘要 |
PURPOSE:To restrain a semiconductor integrated circuit from increasing in size and to enable it to execute a readout operation at a high speed by a method wherein sense amplifiers are arranged in matrix so as to make the overall width of a sense amplifier array smaller than that of a memory cell array. CONSTITUTION:In a PLA, an AND array is provided with six input lines and six output lines (lines on product of terms), and sense amplifiers SA10-SA15 of a first sense amplifier array 11 whose input terminals are connected to each of the lines on product of terms are arranged in a matrix of three columns (direction of a line on product of terms) by two rows. An OR array is provided with six input lines and four output lines (lines on sum of terms), and sense amplifiers SA20-SA23 of a second sense amplifier array 12 whose input terminals are connected to each of the lines on sum of terms are arranged in a matrix of two columns (direction of a line on sum of terms) by two rows. The overall width of the first sense amplifier array 11 becomes smaller than the sum of the widths of the AND array and a control input buffer, and the overall width of the second amplifier array 12 becomes nearly equal to that of the OR array. |
