发明名称 PHASE LOCKED LOOP OSCILLATOR
摘要 PURPOSE:To control the oscillator into a phase locked state continuously and to decrease the band width of a loop filter by providing a sub loop. CONSTITUTION:The oscillator is provided with a sub loop outputting a control voltage corresponding to a phase difference and an adder 5 adding the control voltage of the sub loop and that of a substantial phase locked loop, and outputting the result to a voltage controlled oscillator 3. The sub loop consists of a phase difference detection means 9, a phase deciding circuit 8 to decide whether the phase is lagged or led, and a bias voltage control means 6 generating a control voltage. Thus, the sub loop is made non-operative in the locking state and the substantial phase locked loop is operated, then the cut-off frequency of a loop filter 4 is lowered and noise superimposed on an input signal is sufficiently suppressed since a phase error exceeds a permissible range in the out of locking state, the sub loop is made operative and the voltage controlled oscillator 3 is controlled so as to be phase-locked with the input signal, then the locking state is obtained in a short time.
申请公布号 JPH03222519(A) 申请公布日期 1991.10.01
申请号 JP19900018300 申请日期 1990.01.29
申请人 ANRITSU CORP 发明人 YAMAGUCHI MICHIO
分类号 H03L7/087 主分类号 H03L7/087
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