发明名称
摘要 PURPOSE:To perform positioning inside a memory cell in self-alignment manner by a method wherein the shape obtained by patterning the first layer electrode film is made as the reference for the later processes. CONSTITUTION:A field oxide film 12 and an N<+> type layer 13 are formed on a P type Si substrate 11. Next, the first gate oxide film 14 is deposited, and the first layer poly Si film 15 thereon. Then, a resist pattern 17 is formed after depositing a CVF SiO2 film 16 as the first interlayer insulation film, and the films 16, 15, 14, and the n<+> layer 13 are successively removed. After forming the second gate oxide film 18 on the exposed surface of the substrate, and a gate electrode is formed by patterning it. A common gate electrode is isolated by providing contact holes by means a resist pattern 21 after adhering a CVD SiO2 film 20, and then the third layer poly Si film 23 serving as a digit line is formed.
申请公布号 JPH0363223(B2) 申请公布日期 1991.09.30
申请号 JP19820170363 申请日期 1982.09.29
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 HORIGUCHI FUMIO
分类号 H01L27/10;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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