发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE:To vary the size of video and aspect again, by instructing the memory address of a field memory and controlling the selection signal for the field memory. CONSTITUTION:While a counter 11 counts a signal VsvOS(one shot signal of vertical synchronizing signal) by a prescribed number, no output is given from an AND 2, no address is given and no video signal is recorded. While a counter 13 a signal H (horizontal synchronizing signal) by (m), the specific address number is counted by a counter 14 to stop a Q terminal output of an FF circuit 15 by an overflow signal. As a result, a video signal from a circuit 3 toward horizontal direction less than a suitable size on screen instructs the horizontal address with an A/D converter 19 to record a video digital signal having a suitable width.
申请公布号 JPS5776985(A) 申请公布日期 1982.05.14
申请号 JP19800152487 申请日期 1980.10.29
申请人 SHINMEIWA KOGYO KK 发明人 UEDA MASAO
分类号 H04N7/18;H04N5/272 主分类号 H04N7/18
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