发明名称 VIDEO DATA CONTROL CIRCUIT
摘要 PURPOSE:To perform the printing of a bold face at high speed without applying a burden to a firmware by including a second latch having a capacity for one line of video data for latching a signal from a parallel/serial conversion part on a second latch clock delayed a fixed time from a first latch clock and an OR gate inputting signals from the first and second latches. CONSTITUTION:When printing data is developed from a CPU1 to an FB 2 to be printed in a boldface, a signal C is turned ON ('1'), and the printing data is read from the FB 2 and converted to serial data by a parallel/serial conversion part 3. The serial data is latched in a latch 4 on a latch clock (a). After a fixed time delay, the same data is latched in a latch 5 on a latch clock (b). When the data for one line are stored each in the latches 4, 5 the data in the latches 4, 5 are read by the CPU 1. The data in the latch 4 is ORed with the data in the latch 5 by an OR gate 7, whereby video data (d) in a bold face is generated. In the case of normal printing, the signal C is turned OFF ('0'), all 0 are latched in the latches, and normal video data (d) is generat ed.
申请公布号 JPH03219958(A) 申请公布日期 1991.09.27
申请号 JP19900017106 申请日期 1990.01.25
申请人 NEC NIIGATA LTD 发明人 TAMURA MASATOSHI
分类号 B41J2/00;H04N1/387 主分类号 B41J2/00
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