发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To shorten a semiconductor in a manufacturing process by a method wherein a multilayered film is patterned under a first etching condition, and irregularities are provided to the side face of the multilayered film under a second etching condition. CONSTITUTION:Silicon oxide multilayered films 7-9 different from each other in type and concentration of impurity are formed, and when the cross sections of the multilayered films 7-9 are exposed and etched, as an etching rate varies corresponding to impurity concentration, the silicon oxide film which contains impurity is quickly etched as compared with one which contains no impurity, in result large irregularities are formed on the cross section of the multilayered films 7-9. When a polysilicon 10 is deposited thereon, as the polysilicon 10 is very excellent in step coverage, it is deposited well even in the irregularities formed on the cross section of the multilayered silicon oxide films 7-9. The polysilicon 10 serving as a storage node is patterned, and then the multilayered films 7-9 of silicon oxide are selectively removed through a wet etching method, whereby a storage node 11 large in area can be formed. By this setup, a semiconductor device of this design can be shortened in a manufacturing process.
申请公布号 JPH03218663(A) 申请公布日期 1991.09.26
申请号 JP19900298028 申请日期 1990.11.01
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGAWA HISASHI;NABESHIMA TAMOTSU;FUKUMOTO MASANORI
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
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