发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND PREFORM BONDING MATERIAL USED IN THE SAME
摘要 PURPOSE:To make the thermal resistance of a die bonding part low, prevent the deformation of a semiconductor chip, and improve the reliability, by interposing a high thermal conductivity plate composed of high thermal conductivity material in a bonding layer composed of bonding material. CONSTITUTION:A metallized layer 5 is formed on the rear of a semiconductor chip 1 for bonding to the brazing material (bonding material) 4. A metallized layer 6 of three-layered structure is formed on the main surface of a die bonding substrate 2 in the same manner as the chip 1. A high thermal conductivity plate 3 is formed by using high thermal conductivity material having a thermal expansion coefficient nearly equal to the intermediate value between the chip 1 and the substrate 2. Fluid grooves 3a having semicircular sections are formed on both surfaces of the plate 3. The brazing material 4 easily flows in the grooves 3 toward the outer periphery, and can be formed as thin as possible. Thereby the thermal conductivity of the bonding layer can be improved, the heat dissipating efficiency can be enhanced, the deterioration of element characteristics and the decrease of reliability of the bonding layer can be prevented, the thermal conductivity is increased, the deformation of the chip is prevented, and handling properties and reliability can be improved.
申请公布号 JPH03218031(A) 申请公布日期 1991.09.25
申请号 JP19900013317 申请日期 1990.01.23
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 AKASAKI HIROSHI;OTSUKA KANJI
分类号 H01L21/52;H01S5/02;H01S5/024 主分类号 H01L21/52
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