| 摘要 |
<p>PURPOSE:To prevent pins from increasing in number by outputting a segment driving signal and an address signal to an external RAM from a common output port. CONSTITUTION:Transfer gates 17-1 - 17-0 are energized by a switching control signal (c) of 0 and a switching control signal *c of 1 passed through an inverter 19, namely, outputs segment driving signals SEG1-SEGn in periods Ta and Tb. Further, transfer gates 18-1 - 18-n turn on with a switching control signal (c) of 1 and a switching control signal *c of 0 passed through the inverter 19, namely, outputs (n)-bit address data D0-Dn+1 of the external RAM 16. A pulse generating circuit 20 is applied with the switching control signal (c) of 1 to output an address clock CK2. The segment driving signals SEG1-SEGn are outputted in the periods Ta and Tb from segments 21-1 - 12-n as output ports of a microcomputer for liquid crystal display and the address data D0-Dn-1 are outputted in a period Tc and used as ports in common.</p> |
