发明名称 Re-configurable block length cache.
摘要 <p>A cache organizational signal ("CORG signal") selects between cache organizations. A cache organization is chosen according to the speed of the main memory that is paired with the cache to handle different size blocks of instructions. When the CORG signal organizes the cache to handle blocks having few instructions per block, many blocks are present and a higher hit rate occurs, which works well with a fast main memory. When the CORG signal organizes the cache to handle blocks having more instructions per block, fewer blocks are present, a lower hit rate occurs, and processor idle cycles decrease, which works well with a slower main memory.</p>
申请公布号 EP0448205(A2) 申请公布日期 1991.09.25
申请号 EP19910300912 申请日期 1991.02.05
申请人 ADVANCED MICRO DEVICES, INC. 发明人 SCHNIZLEIN, PAUL G.;WALTERS, DONALD M., JR.
分类号 G06F9/38;G06F12/08 主分类号 G06F9/38
代理机构 代理人
主权项
地址