发明名称 CELL EXCHANGE
摘要 <p>PURPOSE:To decrease a delay in a cell and to save number of buffers by adopting the constitution such that a buffer number of a buffer with a cell written thereon and its address are managed so that the order of cells is not inverted and the cell is outputted by a designated outgoing line in a prescribed order. CONSTITUTION:A buffer control circuit 15 is managed so that a buffer number of a buffer 11 written with a cell in a destination queue 19 and its address are managed in a way that the sequence of cells is not reversed and plural cells outputted to plural outgoing lines 2 are not written in the same buffer 11 simultaneously by a write buffer management memory 21 through the management. Then an incoming line spatial switch 13 is controlled to select the buffer 11 with a cell stored therein and an outgoing spatial switch 14 is controlled to output cells stored in the buffer 11 to an outgoing line 2 designated by a header part in a prescribed order. Thus, the abort due to collision of cells is less with a few buffers and the scale of the switch connecting the buffers, the incoming and outgoing lines is made small.</p>
申请公布号 JPH03216044(A) 申请公布日期 1991.09.24
申请号 JP19900012240 申请日期 1990.01.22
申请人 MITSUBISHI ELECTRIC CORP 发明人 MIURA SETSUKO;YAMANAKA HIDEAKI;OSHIMA KAZUYOSHI
分类号 H04Q3/00;H04L12/28 主分类号 H04Q3/00
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