| 摘要 |
<p>PURPOSE:To apply synchronization processing in time division by a single circuit and to make the circuit small and to reduce the cost by using a counter circuit, a shift circuit and a storage circuit. CONSTITUTION:A multi-frame signal being an input signal 10 is given to a shift circuit 1, in which the signal is subject to time division sequentially, and a resulting parallel data 20 for each multi-frame is stored in a memory circuit 2. A counter circuit 3 counts number of pulses of the multi-frame of the input signal and outputs a count 40. A discrimination circuit 4 receives the count 40 and the parallel data 20 to output a synchronization timing output 60 of multi-frame. Then the memory circuit 2 receives the parallel signal 20 of the shift circuit 1 and the count 40 of the counter circuit 3 and outputs a synchronizing data signal 30. Thus, the circuit is made small and the cost is reduced.</p> |
