| 摘要 |
<p>PURPOSE:To resolve a read disturb defect by providing a bias generating circuit, which generates a source bias only at the time of read, on the source side of memory transistors TRs. CONSTITUTION:A source bias generating circuit 3 connected in parallel with an erasing high voltage circuit 2 is provided on the side of a common source 10 of memory TRs Q1 to Qn and generates the source bias only at the time of read operation. At the time of read, a voltage is applied to the source side of memory TRs, and memory TRs which become the depletion type by over- erasing effectively become enhancement type TRs. Thus, a read disturb defect is resolved.</p> |
