| 摘要 |
A self biased, high-gain differential amplifier which is substantially immune to process and temperature variations. A first pair of CMOS transistors is coupled to operate in an active region and an output from the common junction is coupled to drive a second pair of CMOS transistors. The second pair of CMOS transistors have their outputs coupled to provide a negative feedback to the first pair of CMOS transistors. A third pair of CMOS transistors is coupled in parallel to the first pair of CMOS transistors for accepting an input signal and generating an output, wherein the output is a function of the input signal in relation to a reference voltage. A fourth pair of CMOS transistors is coupled to be driven by the third pair of CMOS transistors and provides a CMOS compatible signal which switches between two CMOS logic states. |
