发明名称 INTEGRATED CIRCUIT
摘要 PURPOSE:To precisely lay out wiring by reading the clock of a latch circuit from a latch circuit on the output side of a shift register and inserting an inverting means to each latch circuit to generate the read clock of the latch circuit in the preceding stage. CONSTITUTION:Read clocks of latch circuits 1 to 4 are transmitted to latch circuits in preceding stages through inverters 5 to 8 based on a clock 1. Read clocks A to D in respective states and outputs Q1 to Q4 of respective latch circuits have waveforms, and each of extents of delay of waveforms of clocks A to D corresponds to one inverter stage, and it does not matter that waveforms D and C are in the high level together in a certain period because the output of the latch circuit 1 is stable then, and the same may be the waveforms A and B. By this circuit constitution, the wiring is laid out without too much concern of wiring resistance.
申请公布号 JPH03216898(A) 申请公布日期 1991.09.24
申请号 JP19900013047 申请日期 1990.01.22
申请人 NEC CORP 发明人 SUZUKI HIROYUKI
分类号 G06F1/10;G06F1/12;G11C19/00;H03K3/037 主分类号 G06F1/10
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