发明名称 METHOD AND APPARATUS FOR GENERATING SYNCHRONOUS CLOCK SIGNAL
摘要 <p>PURPOSE: To perform an operation in a remote host computer by calculating a transmission delay between clock signal sources as the function of a measured phase difference, correcting the phase difference corresponding to the calculated transmission delay and changing the frequency of clock signals corresponding to the phase difference. CONSTITUTION: For propagation delays for respective links 22 and 24, by averaging opposite phases measured by respective clock sources 16a-16d at two end parts for driving the respective links 22 and 24, the propagation delays for the links 22 and 24 are decided. The calculated propagation delays are supplied to the respective clock sources 16a-16d and the clock sources 16a-16d correct the phase difference measured by it for the propagation delay. The respective clock source 16a-16d obtain correction signals for controlling their own oscillator frequency so as to lock the phase with the other clock signals by using the corrected phase difference. Thus, fault-resistant clocks operatable in the remote host computer are obtained.</p>
申请公布号 JPH03214214(A) 申请公布日期 1991.09.19
申请号 JP19900183867 申请日期 1990.07.11
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 ROORENSU HENRII ATSUPURUBAUMU;TAO BAN DANGU;UIRIAMU ARUBAATO MUUAMAN;TOMASU BAJIRU SUMISU ZA SAADO
分类号 G06F1/12;G06F1/14;G06F11/16 主分类号 G06F1/12
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