Digital memory for video signals - has part image data provided for input to memory in continuous process with address control

摘要

A video camera delivers a pair of alternating half images that each consist of a number of pixels. The pixel data is received by bus driver stage (3) that provides an input to a RAM memory (2). A clock generator (7) provides an input to an address generator (10) and an inverter (6) to provide enables (E) for the bus driver stages (3,4). The pixel data is continuously entered into memory and is read out in sorted form with the addresses generated by a read only memory. ADVANTAGE - Allows part image read out while new information is entered.