发明名称 COUNTER CIRCUIT
摘要 PURPOSE:To prevent malfunctions, by inverting an operating FF at the time when another counting circuit reaches a prescribed count value from the inversion time in case that an FF which outputs a countenable-signal is inverted. CONSTITUTION:If a D type FF F1 is inverted through an inverter 12 and an AND gate 13 at the time when 4-bit binary counters 2-4 count, for example, 2048 clock pulses CLK, a binary counter 11 is substituted for counters 2-4 to count pulses CLK after the FF1 is inverted. Thus, if a D type FF6 is inverted when the counter 11 counts 8 pulses CLK, the FF6 is inverted when a desired number of pulses CLK is counted.
申请公布号 JPS5780832(A) 申请公布日期 1982.05.20
申请号 JP19800156451 申请日期 1980.11.08
申请人 HITACHI SEISAKUSHO KK 发明人 MOMOKI HIROMITSU;INOUE YASUO
分类号 H03K21/38;H03K21/40;(IPC1-7):03K21/34 主分类号 H03K21/38
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