发明名称 DELAY CIRCUIT
摘要 <p>PURPOSE:To decide the delay of a delay signal with either analog or digital method by using an external command signal to selectively output an analog delay signal or a digital delay signal. CONSTITUTION:A reference signal is inputted to an analog delay circuit 15 and the reference signal, a CLK signal, a latch signal and a delay time data are inputted to a digital delay circuit 20. The delay signal of the analog delay circuit 15, the delay signal of the digital delay circuit 20 and an external command signal are inputted to a selection circuit 21. Then the selection circuit 21 uses the external command signal to select the delay signal of the analog delay circuit 15 and the delay signal of the digital delay circuit 20 and outputs the result as the delay signal with respect to the reference signal. Thus, the delay signal is generated by either of analog or digital method.</p>
申请公布号 JPH03212016(A) 申请公布日期 1991.09.17
申请号 JP19900007427 申请日期 1990.01.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KONISHI HIROYUKI;SEIKE TADAYOSHI;WATANABE SEIJI;YOSHIMOTO HISASHI;MARUYAMA SHINICHI
分类号 H03K5/13 主分类号 H03K5/13
代理机构 代理人
主权项
地址