发明名称 |
Device for synchronizing a clock in relation to an incident digital signal, in particular at high transmission rates |
摘要 |
The device comprises preprocessing circuitry which deliver to a phase locked loop a preprocessed signal obtained from a replica of the incident digital signal staggered in time by a fraction of the cycle of the clock signal of the phase locked loop. This device then allows a fast synchronization of the clock of the phase locked loop in relation to the incident digital signal, in particular at high transmission rates.
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申请公布号 |
US5050193(A) |
申请公布日期 |
1991.09.17 |
申请号 |
US19880274478 |
申请日期 |
1988.11.21 |
申请人 |
ELECTRONIQUE SERGE DASSAULT |
发明人 |
PONSARD, BENOIT |
分类号 |
H04L7/00;H04L7/02;H04L7/033;H04L7/04 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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