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发明名称
Alignment and exposure apparatus and method for manufacture of integrated circuits
摘要
申请公布号
US5050111(A)
申请公布日期
1991.09.17
申请号
US19900542653
申请日期
1990.06.25
申请人
CANON KABUSHIKI KAISHA
发明人
AYATA, NAOKI;YAMAMURA, MITSUGU;HAMASAKI, BUNEI;KOSUGI, MASAO;TAKAHASHI, KAZUO;SEKI, MITSUAKI
分类号
G03F7/20;G03F9/00
主分类号
G03F7/20
代理机构
代理人
主权项
地址
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