发明名称 Multiplier circuit for digitally coded numbers - has shift register unit for handling fixed valves of result
摘要 A multiplier circuit is used for operating on two digitally coded The main unit is in the form of a matrix multiplier circuit (1) coupled to a apir of adder circuits (2,3) with carry propagation being handled by coupled adder stages (4). Each adder stage provides inputs to shift register units (5b) that are serially coupled to further shift register (5a). The output shift register stores the fixed numbers of the result value during the part product handling.
申请公布号 DE4002660(A1) 申请公布日期 1991.09.12
申请号 DE19904002660 申请日期 1990.01.30
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/491;G06F7/52 主分类号 G06F7/491
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