| 摘要 |
A memory circuit having an improved redundant structure which can operate at a high speed with an improved replacement of input/output circuits is disclosed. The memory circuit includes a first number of memory blocks having a plurality of memory cells, a second number of output terminals, the second number being smaller than the first number, output circuits of the first number provided for the memory blocks, and a programmable switch circuit coupled between the output circuits and the output terminals, in which the second number of output circuits are coupled to the output terminals through the programmable switch circuit. |
