Fast sample and hold circuit configuration

摘要

A circuit configuration includes a symmetrically constructed sample and hold amplifier. A first switchable level shifter has an input in the form of a first signal input terminal for receiving a given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. A second switchable level shifter has an input in the form of a second signal input terminal for receiving a signal complementary to the given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. The input and output signals of each of the switchable level shifters having a different constant direct voltage difference as a function of the switching state of the level shifters.