发明名称 |
APPARATUS AND METHOD FOR EXPEDITING SUBTRACTION PROCEDURES IN A CARRY/SAVE ADDER MULTIPLICATION UNIT |
摘要 |
In a multiplier unit implemented with carry/save adder stages and executing a modified Booth algorithm, the signals, required to complete the 2's complement in order to perform a subtraction operation during the multiplication procedure using carry/save adder cells, are entered in the first carry/save stage in the appropriate carry/save cell positions. In this manner, one less signal is processed by the time-critical least significant cell associated with each carry/save adder stage, thereby reducing the overall time delay associated with the multiplier unit and accelerating the multiplication operation. |
申请公布号 |
CA1288868(C) |
申请公布日期 |
1991.09.10 |
申请号 |
CA19880570664 |
申请日期 |
1988.06.29 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
BENSCHNEIDER, BRADLEY J.;PENG, VICTOR |
分类号 |
G06F7/533;G06F7/508;G06F7/52 |
主分类号 |
G06F7/533 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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