| 摘要 |
PURPOSE:To execute the high integration by providing a NAND circuit in which an output value is varied by a delay time generated in two inverter string parts taken out from an inverter train, and allowing each inverter train part to have an overlapping part. CONSTITUTION:Inverters 11-14 are connected in a longitudinal string, lines drawn out of the input terminal T1 of a first stage inverter 11 and the input terminal T4 of a fourth stage inverter 14 are inputted to a NAND circuit 15, and lines drawn out of the input terminal T2 of a second stage inverter 12 and the output terminal T5 of a fourth stage inverter 14 are inputted to a NAND circuit 16. Output terminals of the NAND circuits 15, 16 are subjected to wired OR connection, when one of both outputs comes to a varied state from a regular state, a pulsative waveform showing a fact that an input signal is varied is outputted to an output terminal T6. In such a way, since an overlapping part is provided on two inverter string parts, part of a delaying circuit can be shared, and a high integration can be executed. |
