| 摘要 |
<p>PURPOSE: To execute a reading-changing-writing operation in one memory cycle by providing with a pair of a second signal lines which are connected to a node and by which data are written into a cell regardless of a first signal line. CONSTITUTION: The node 45 is connected to a bit line 51(BL1#) via a transistor 55 and connected to a bit line 52(BL2#) via transistor 56. (The signal of mark #is used for indicating a complementary type binary state or a signal line transmitting the state). The complementary type node 46 is connected to a bit line 53(BL2) via a transistor 57 and connected to a bit line 54(BL1) via a transistor 58. Therefore, writing lines 22-25 are broken from the cell 40 under control of an extended word line signal. By this way, the reading-changing- writing cycle operation is executed in one memory cycle.</p> |
