发明名称 ARITHMETIC CIRCUIT
摘要 <p>PURPOSE:To simplify the software by providing a detector detecting whether or not an output of an inverting circuit and an input data have a specific repetitive pattern and controlling the inverting circuit. CONSTITUTION:A detector 110 consists of a counter, which counts up when '1' is inputted and reset when '0' is inputted and outputs a carry when the content of the counter reaches 64. An inverting circuit 111 inverts an output data when a carry is outputted from the detector 110. For example, when the content of a shift register A is [10011101101111010] and when consecutive '1s' are detected by 64 bits, the inverting circuit 111 inverts the output '1' into '0'. Thus, the software is simplified.</p>
申请公布号 JPH03204252(A) 申请公布日期 1991.09.05
申请号 JP19890342807 申请日期 1989.12.29
申请人 NEC CORP 发明人 CHOKAI YOSHITAKA
分类号 H04L9/22;H03M7/30;H04L7/00;H04L9/18 主分类号 H04L9/22
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