发明名称 TWO-LEVEL BRANCH PREDICTION CACHE
摘要 An improved branch prediction cache (BPC) scheme that utilizes a hybrid cache structure. The BPC (13) provides two levels of branch information caching. The fully associative first level BPC (152) is a shallow but wide structure (36 32-byte entries), which caches full prediction information for a limited number of branch instructions. The second direct mapped level BPC (155) is a deep but narrow structure (256 2-byte entries), which caches only partial prediction information, but does so for a much larger number of branch instructions. As each branch instruction is fetched and decoded, its address is used to perform parallel look-ups in the two branch prediction caches.
申请公布号 WO9113402(A1) 申请公布日期 1991.09.05
申请号 WO1991US00826 申请日期 1991.02.06
申请人 NEXGEN MICROSYSTEMS 发明人 STILES, DAVID, R.;FAVOR, JOHN, G.;VAN DYKE, KORBIN, S.
分类号 G06F9/38 主分类号 G06F9/38
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