| 摘要 |
PURPOSE:To reduce the current consumption of a multiplication circuit by keeping this multiplication circuit in its precedent state when no multiplicating operation is required so as to evade the change of the internal state of the multiplication circuit. CONSTITUTION:When a stop signal STOP is equal to 0, a clock signal CK1 is inputted in a cycle T and the input data are latched by an X register 1 and a Y register 2 in this timing. In regard of the contents of a register 2, the low-order side and the high-order side are inputted to a multiplier with 1st and 2nd multiplying operations respectively. Thus the contents of the register 2 undergo the multiplication. When the signal STOP is equal to 1, all clocks of the registers 1 and 2 and the latches 6 and 7 are stopped by the signal STOP. Then a selector 3 selects the side of the 2nd time, i.e., the high-order side of the register 2 which holds the data obtained before the multiplication is not needed. Thus the 2nd multiplication state st before the multiplication is not needed is held as it is in this multiplication circuit. Then the multiplication circuit has no internal change. |
