发明名称
摘要 PURPOSE:To strengthen a static memory or the like against the influence of variation in the power voltage or the like by forming an MOS inverter of an E/R type and applying different bias voltages in active mode and in standby mode. CONSTITUTION:An inverter circuit is composed of series connection of a driving E-type MOS T1 and a load resistor R, and of D-type or I-type MOS T31 operating ON or OFF with a CE signal between the resistor R and a VDD power source. The VBB voltage is supplied from a variable self-bias unit with the CE signal in such a manner that the bias is deeply provided at the standby time to completely break the T31 for low power consumption. A static type memory cell can be formed, for example, of inverters 21, 22 of this structure and transfer elements T15, T16 so as not to be affected by the influence of back bias voltage by employing the load elements with the resistors R11, R12. Further, it can be strengthened against the influence of variation in the temperature and alpha-ray.
申请公布号 JPH0358182(B2) 申请公布日期 1991.09.04
申请号 JP19800143932 申请日期 1980.10.15
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MASUOKA FUJIO
分类号 G11C11/412;G05F3/20;G11C11/407;G11C11/413;H01L21/822;H01L21/8234;H01L21/8244;H01L27/04;H01L27/06;H01L27/088;H01L27/11;H01L29/78 主分类号 G11C11/412
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