| 摘要 |
<p>PURPOSE: To select a single byte for high speed writing or writing through operation by using a multiport cell providing with one asymmetrical flip-flop and single device per each writing port and providing a cell with a writing byte control means for a common word line. CONSTITUTION: An AND gate is selected only when both input signals i.e., a main writing word line signal WL and special writing byte signal WBi are activated, by which the design for the cell having an excellent area efficiency and high speed writing performance is optimized. The flip-flop is composed of a pair of cross connected inverters, a little larger device than the minimum is used so that one side of inverters T2 and T3 are adapted to the size of an inverter buffer T6 connected to those. An inverse action at the time of pulling up the node of the flip-flop is reduced with the other side of inverters T4 and T5 which is a writing N-FET(N chanel field effect transistor). By this way, the single byte for the high speed writing through operation is selected.</p> |
