发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To adjust the phase of a signal approximately to 180 deg. to allow the signal to approach an ideal complementary signal and to improve the performance of an input buffer circuit in a high frequency area by connecting a phase adjusting circuit to the post stage of a positive or negative phase signal level shifting circuit. CONSTITUTION:The phase adjusting circuit 14 is connected to the post stage of a positive phase signal level shifting circuit 12 and a negative phase signal level shifting circuit 13. The circuit 14 is formed by the 1st transistor TD, a level shifting element D and a current source 10 and the gate G of the TD is connected to the source S of the 2nd transistor TO. Thereby, an input signal is turned to high frequency, and even if a phase difference is generated between a positive phase output signal and a negative phase output signal, the phase of the signal can be adjusted approximately to 180 deg. by utilizing the delay of signal transmission due to the influence of the gate capacity or source/drain capacity of the TD. Consequently, the output can be allowed to approach the ideal complementary signal and the performance of the input buffer circuit in the high frequency area can be improved.
申请公布号 JPH03201117(A) 申请公布日期 1991.09.03
申请号 JP19890342453 申请日期 1989.12.28
申请人 FUJITSU LTD 发明人 ONODERA HIROYUKI
分类号 G06F3/00;H03K5/13;H03K5/133;H03K19/0175;H03K19/0952 主分类号 G06F3/00
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