发明名称
摘要 PURPOSE:To shorten the RS-CS response time in the multipoint system of MODEMs by performing equalization of line distortion and timing phase matching in the transmission side. CONSTITUTION:At an initial time, a master station MODEM 1 transmits a training signal, which is so long that this signal can be received by slave station MODEMs 21-2n, after synchronizing phases of processings of a transmitting part 10S and a receiving part 10R with each other. A receiving part 20R sends a demodulating clock to a transmitting part 20S of its own station, and the transmitting part 20S performs the modulating operation in synchronism with the demodulating clock. Slave station MODEMs 21-2n send a training signal which is so long that this signal can be received by the receiving part 10R, and the receiving part 10R jumps a sampling clock and the demodulating clock based on an extracted timing, and an extent theta of phase jump is stored in a memory 10T. Contents of an automatic equalizer and the extent theta of phase jump are sent to slave station MODEMs 2n, and contents of the automatic equalizer are set to equalizers in respective slave station MODEMs, and a modulating clock is shifted from the demodulating clock by the extent theta of phase jump in a delay means 20T.
申请公布号 JPH0357658(B2) 申请公布日期 1991.09.02
申请号 JP19860058716 申请日期 1986.03.17
申请人 FUJITSU LTD 发明人 INOE MASAYOSHI
分类号 H04L27/01;H04B3/10;H04L27/00 主分类号 H04L27/01
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