发明名称 DATA PROCESSOR
摘要 <p>PURPOSE:To realize an instruction decoding control function, by selecting the output of an instruction register through an address selecting circuit and designating the address of a memory with the selected output to produce the control signal of a data processor. CONSTITUTION:A program counter 11 designates an address which stores the information to produce a program and a control signal and reads the information out of a memory 10 to control the program sequence. In addition to the counter 11, an instruction register 12 that stores the read instruction information, an address selecting circuit 13 that selects an address designation signal of the memory 10, and an execution unit 14 that executes the data process based on the control signal information are provided respectively. The outputs of the counter 11 and the register 12 are selected by the circuit 13 in the form of the address information. Then the address of the memory 10 is designated.</p>
申请公布号 JPS5790759(A) 申请公布日期 1982.06.05
申请号 JP19800166292 申请日期 1980.11.26
申请人 NIPPON DENKI KK 发明人 AKASHI MINEO
分类号 G06F9/30;G06F9/32;G06F15/78 主分类号 G06F9/30
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