| 摘要 |
PURPOSE:To simplify the constitution of a logic circuit and to facilitate the layout by bringing a node to a prescribed level when any transmission gate is turned off in response to a signal on a control line. CONSTITUTION:Signals (a), (c) on a control line inputted to input terminals INA and INC are signals having a longer enable period than that of signals (b), (d) inputted to input terminals INB, IND. Since a series transistor(TR) 1 in a logic circuit operates with a margin for speed, it is not required to increase the operating speed through the increased size of the series TR 1. Thus, the entire layout area is reduced. Moreover, when plural similar logic circuits are manufactured, since it is possible to provide an inverter to invert the signal b, d in common, the number of TRs is reduced by the common share. |
