| 摘要 |
PURPOSE:To avoid the deterioration of the high frequency characteristics of a high frequency and high power transistor caused by a parasitic capacitance by a method wherein a cavity which is formed by processing the rear of a semiconductor substrate is provided directly under a bonding pad or a probing pad. CONSTITUTION:The rear of a semi-insulating semiconductor substrate 1 on which a circuit element is formed is polished and photoresist layers 7 and 8 are formed. Then a cavity 3 is formed by isotropic wet etching and the photoresist layers 7 and 8 are removed. The completed chip is mounted on the metallized layer 5 of a ceramic package 4. Therefore, the parasitic capacitance of a bonding or probing pad 2 which is produced when the chip is mounted on the package can be reduced. With this constitution, the deterioration of the high frequency characteristics of a high frequency and high power transistor can be avoided.
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