发明名称 Nand cell type programmable read-only memory with common control gate driver circuit
摘要 A NAND cell type EEPROM has a substrate, parallel bit lines formed above the substrate, and a memory cell section including an array of NAND type cell units associated with the same corresponding bit line. Each of the NAND type cell units has a series-circuit of eight data storage transistors and at least one selection transistor. Each data storage transistor has a floating gate for storing carriers injected thereinto by tunneling and a control gate respectively connected to word lines. A control gate driver circuit is provided in common for all the NAND type cell units that are assisted with the same bit line. Transfer gates are connected between the common driver circuit and the NAND cell units.
申请公布号 US5043942(A) 申请公布日期 1991.08.27
申请号 US19900532627 申请日期 1990.06.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IWATA, YOSHIHISA;MOMODOMI, MASAKI;ITOH, YASUO;TANAKA, TOMOHARU;ODAIRA, HIDEKO
分类号 G11C17/00;G11C8/10;G11C16/04;G11C16/06;G11C16/08;G11C16/16;H01L21/8247;H01L27/112;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C17/00
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